An Efficient Time-Skew Calibration Algorithm for Time-Interleaved ADCs via Matrix Binary Decomposition and Increment-Based Adaption

The research team presents a fully digital background time-skew calibration algorithm for time-interleaved analog-to-digital converters (TI-ADCs). To address interleaving spurs introduced by sampling skew in clock distribution networks and bandwidth mismatch—equivalent to time skew in first-order transfer functions—the team proposes a calibration scheme based on matrix binary decomposition and increment-based adaption. The time-skew errors are modeled as additive error terms via first-order Taylor expansion and corrected by finite impulse response (FIR) differentiators. The matrix binary decomposition technique enables coefficients estimation using only addition and bit-shift operations, irrespective of the number of channels, substantially reducing computational complexity. Furthermore, the increment-based adaption technique dynamically adjusts iteration step size by detecting the increment of estimated coefficient updates, thus achieving both high convergence speed and accuracy. The algorithm is validated using data from an 11-bit 3.5 GS/s 8-channel time-interleaved SAR ADC fabricated in TSMC 28nm CMOS. Measurement results demonstrate SFDR and SNDR improvements 20.6 dB and 17.4 dB at Nyquist frequency, respectively. Compared to existing all-digital time skew calibration methods, the proposed approach offers faster convergence and lower hardware complexity.

This work was published in IEEE Transactions on Circuits and Systems II (TCAS-II) in 2026, with Fanshu Ye as first author. He is currently pursuing the M.S. degree in microelectronics with Fudan University, Shanghai.

Paper：F. Ye, et al., Efficient Time-Skew Calibration for Time-Interleaved ADC via Matrix Binary Decomposition and Increment-Based Adaption, in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 73, no. 2, pp. 118-122, Feb. 2026.