Ultra-Wideband Reconfigurable Transceiver Front-End Chip

A wideband reconfigurable RF receiver with the range of 5–16-GHz frequency coverage and 100–500-MHz analog baseband bandwidth is proposed. This receiver can cover a wide frequency range from 5 to 16 GHz, making it suitable for various communication protocols such as 5G, satellite communication, and radar. Additionally, this receiver  is capable of maintaining a low noise figure and low power consumption across this wide frequency range.

  

Paper Link:

A 5-to-16GHz Reconfigurable Quadrature Receiver with 50% Duty-Cycle LO and IQ-Leakage Suppression


X-Band Radiation-Hardened Low-Noise Amplifier (LNA)

A novel capacitor assisting triple-winding transformer (CTTF) low noise amplifier (LNA) is presented. The assisting capacitor in the triple-winding transformer expands the design space by enabling independent control of the coupling strength between each two inductors. AT the same time, the assisting capacitor further emphasizes the equivalent negative resistor in the primary resonant tank at higher frequencies, which fundamentally improves the design trade-off among noise figure (NF), gain and bandwidth.

 

Paper Link:

A Capacitor Assisting Triple-Winding Transformer Low-Noise Amplifier with 0.8-1.5dB NF 6-12GHz BW ±0.75dB Ripple in 130nm SOI CMOS

A 6–12 GHz Wideband Low-Noise Amplifier With 0.8–1.5 dB NF and ±0.75 dB Ripple Enabled by the Capacitor Assisting Triple-Winding Transformer


57-64 GHz High Efficiency Power Amplifier

An efficient and linear two-way parallel-combined CMOS power amplifier (PA) is proposed. A pair of over-neutralization cross-coupled capacitors are used to boost the power gain and ensure stability. Design-oriented analysis leads to the optimum efficiency of the transformers in the power combiner, and the dummy-shielding winding is applied to improve the load impedance uniformity seen by each PA cell.

 

Paper Link:

A 57-64 GHz Two-Way Parallel-Combined Power Amplifier with 16.6 dBm Psat and 23.6% Peak PAE in 40nm Bulk CMOS