High-Speed, High-Precision Analog-to-Digital Converter

3.5 GS/s 11-bit eight-channel time-interleaved SAR ADC, integrating eight high-speed 440 MS/s subchannels and eight phase clock generation circuits on-chip. Performs one-time calibration of channel offset and clock skew in the analog domain, achieving a 54 dB signal-to-noise distortion ratio at the Nyquist input frequency.

Paper Link：

Systematic Design of a 3.5 GS/s 11-bit Time-Interleaved SAR ADC in 28 nm CMOS Achieving 54 dB SNDR at Nyquist Frequency